William C. Carter Award

Carter_Award

The William C. Carter Award is presented annually at the DSN Conference to recognize an individual who has made a significant contribution to the field of dependable computing through his or her graduate dissertation research.

The IEEE TC on Dependable Computing and Fault Tolerance (TCFT) and IFIP Working Group 10.4 on Dependable Computing and Fault Tolerance (WG 10.4) jointly sponsor the William C. Carter PhD Dissertation Award in Dependability. Instituted in 1997 as the William C. Carter Award, it was reformulated in 2016, where the present name and eligibility requirements aim at recognizing an individual who has made a significant contribution to the field of dependable and secure computing throughout his or her PhD dissertation.

The award commemorates the late William C. Carter, a key figure in the formation and development of the field of dependable computing. Bill Carter always took the time to encourage, mentor, and inspire newcomers to this field and this award honors and sustains this aspect of his legacy.

The award recipient receives a $750 US cash award as a contribution to travel expenses and a waived registration fee to attend the edition of the IEEE/IFIP International Conference on Dependable Systems and Networks (DSN) at which the award is presented. The recipient will be required to attend DSN to receive the award and is invited to give a short presentation to DSN attendees.

To be eligible for the award, the nominee's PhD defense must be completed prior to the nomination deadline and must have occurred no more than 16 months prior to the nomination deadline. Previous recipients of the (old or renamed) Carter Award are not eligible.

🏆 2025 William C. Carter Award Winner

Baris Kasikci

Abdullah Giray Yağlıkçı, ETH Zurich, Switzerland
PhD Dissertation title: “Enabling Efficient and Scalable DRAM Read Disturbance Mitigation via New Experimental Insights into Modern DRAM Chips”
Defense date: April 30th, 2024
Thesis Advisor: Prof. Dr. Onur Mutlu (ETH Zurich)

Excerpt from the report of the selection committee: The dissertation analyzed memory disturbance under various factors, such as chip temperature, access patterns, physical location, and proposed efficient countermeasures. As put forth in the nomination statement, the dissertation:

  • brings a fundamental understanding of read disturbance via a thorough and rigorous experimental work,
  • proposes creative countermeasures to read disturbance attacks and rigorously evaluates those techniques,
  • demonstrates experimentally that read disturbance is more difficult than previously known, as it depends on multiple other factors, such as temperature, chip aging, voltage, or even physical location.
This research already has a profound impact on both academic research, with results presented at major venues including DSN, HPCA, MICRO, with multiple paper awards. It also has a strong impact on the industry, such as influencing JEDEC-defined standardized DRAM chips, and raising awareness about previously overlooked vulnerabilities.

DSN-2025 Carter Award Committee

Chair:

Xavier Defago, Institute of Science Tokyo, Japan

Members:

  • Pascal Felber, University of Neuchâtel, Switzerland
  • Jiangshan Yu, University of Sydney, NSW, Australia

Complete information on the award can be found on the award web page: http://www.dependability.org/carter-award.html